毕业论文翻译数字滤波器设计下载

2 adjustable parameter FIR filter system hardware designThis design using the FPGA parallel structure, the speed of operation characteristics and properties of high-speed reliable USB2.0 interface, designed a FPGA USB2.0 + + computer of FIR digital filter system, the FPGA swiftness and computer flexibility by USB2.0 bus organically, structure diagram fig.03 shows. On one hand, the computer will be calculated by USB2.0 total line configuration parameters and FPGA, in order to achieve different window, different cut-off frequency of FIR filters. On the other hand, using 10 A/D converter frequency-field on signal, digital signal input to the FPGA device, in the FPGA device of FIR filter, after filtering through the data transmission USB2.0 bus to the computer.2, 1 A/D conversion moduleA/D conversion module's main function is to simulate digital signal, and then sent into the FPGA in digital signal processing. A/D conversion module chart shown in figure 4, analog signal disposal, then all the A/D converter FPGA under the control of the will of the signal after converting digital signal, the power supply module provides 5V and 3.3 for chip. V2.1.1 signal circuitThe system USES A/D conversion chip of the total value of the analog input signal voltage output, for some + 2V analog signal range incompliance with A/D conversion chip requirements, in order to expand the scope of application system, so the A/D conversion before signal disposal. Regulate is amplified, buffer or calibration analog signals, make its suitable mode converter (ADC) / input. This work is the key to select op-amp.Design for two signal circuit voltage circuit, followed by low power voltage feedback type AD8052 amplifier. Signal circuit as shown in figure 5. Theamplifier input voltage range - 4V ~ 0.2 V. 8 feet for working voltage, the single power supply, make its + 5V normal work. According to the input Signal for Signal, the circuit diagram, the output voltage range Sigin AD can make A/D conversion chips working normally.2.1.2 A/D conversion circuitA/D circuit in the selection of input to the sampling period, the system simulation signal acquisition. Considering the flexibility and later upgrade system, the design of A/D conversion chip USES accuracy of 10, sampling rate is highest, the lowest 20kHz 40MHz for the AD9203 chip.AD9203 AD companies is A single channel, low voltage of high-speed A/D conversion chip. It is stable and reliable, and the precision in the sampling range, bandwidth basic maintained 10 precision, The sampling rate in 40MHz, effective digit position, still reach 9.55 ± 0.25 differential nonlinearity LSB and signal-to-noise ratio and the distortion degree in 59dB around. The more flexible working voltage AD9203, allowing 2.7 V - 3.6 V scope changes, particularly suitable for portable devices in low voltage under high-speed operation. A/D circuit as shown in figure 6. ADSigin analog signals by 25 feet input, the transformation from the FPGA provide ADCLK clock from 15 feet after conversion, the input signal ADD0 ~ 10 digits ADD9 by 3 ~ 12 feet in the output to the FPGA, FPGA in digital signal processing.2.2 power circuitDue to the external power supply voltage, provide for 5V and A/D conversion chip AD9203 working voltage and FPGA I/O working voltage is 3.3 V, therefore the voltage circuit design, realization from 3.3 V to 5V voltage conversion. Using the voltage conversion chips for LT1587CM - 330, connections as shown in figure 7. In the design, circuit 2Amax joined the fuse, in order to prevent excessive current and burned-out circuit.230 FPGA design moduleThe FPGA module is the core, bearing filter system for all the digital circuit. In the design process, emphasizes on the concept of system, the FPGA realizing the system platform on which need all digital logic, including the adder on time-multiplier, buffer, and Phase locked Loop (PLL - and Phase lock Loop), the USB interface logic, etc. So that the system is fully programmable digital part only, adjustable state can be updated FPGA program according to requirements, strong adaptability and flexibility.

数字滤波器是对数字信号进行滤波处理以得到期望的响应特性的离散时间系统。作为一种电子滤波器，数位滤波器与完全工作在模拟信号域的模拟滤波器不同。数位滤波器工作在数字信号域，它处理的对象是经由采样器件将模拟信号转换而得到的数字信号。Digital filter is filtered to digital signal processing to achieve the desired response characteristics of discrete-time system. As a kind of electronic filters, digital filter and all work in analog signals domain simulation filter is different. Digital filter work in digital signal domain, it handles objects through sampling device is analog signal conversion for digital signals. 数位滤波器的工作方式与模拟滤波器也完全不同：后者完全依靠电阻、电容、晶体管等电子元件组成的物理网络实现滤波功能；而前者是通过数字运算器件对输入的数字信号进行运算和处理，从而实现设计要求的特性。Digital filter way of working and simulation filter also completely different: the latter depend entirely on the resistor, capacitor, transistor, and other electronic components of physical network realization filter function; While the former is through digital computing devices for the entry of digital signal calculations and processing, thus realize the requirement of design characteristics. 数位滤波器理论上可以实现任何可以用数学算法表示的滤波效果。数位滤波器的两个主要限制条件是它们的速度和成本。数位滤波器不可能比滤波器内部的计算机的运算速度更快。但是随着集成电路成本的不断降低，数位滤波器变得越来越常见并且已经成为了如收音机、蜂窝电话、立体声接收机这样的日常用品的重要组成部分。Digital filter theory can achieve any can use mathematical algorithm the filtering effect said. Digital filter's two main constraints is their speed and cost. Digital filter impossible internal computer than filter the faster. But as the integrated circuit costs continue to reduce, digital filter is becoming more and more common and has become such as radio, cell phones, stereo receivers such an important part of daily articles. 数位滤波器一般由寄存器、延时器、加法器和乘法器等基本数字电路实现。随着集成电路技术的发展，其性能不断提高而成本却不断降低，数位滤波器的应用领域也因此越来越广。按照数位滤波器的特性，它可以被分为线性与非线性、因果与非因果、无限脉冲响应（IIR）与有限脉冲响应（FIR）等等。其中，线性时不变的数字滤波器是最基本的类型；而由于数字系统可以对延时器加以利用，因此可以引入一定程度的非因果性，获得比传统的因果滤波器更灵活强大的特性；相对于IIR滤波器，FIR滤波器有着易于实现和系统绝对稳定的优势，因此得到广泛的应用；对于时变系统滤波器的研究则导致了以卡尔曼滤波为代表的自适应滤波理论Digital filter generally by registers, delay device, on time-multiplier adder and basic digital circuit implementation. Along with the development of the integrated circuit technology, its with improving performance and cost is lower, digital filter application fields and therefore more and more widely. According to the characteristics of digital filter, it can be divided into linear and nonlinear, causal and the causal, infinite impulse response (IIR) and finite impulse response (FIR), etc. Among them, when the constant linear digital filter is the most basic type; And as a result of digital system can use them to delay device, so can introduce some degree of the causality, get more than traditional causal filter the characteristics of flexible strong; Relative to IIR filter, FIR filters have easy to realize and system is stable advantage, so widely applied; For time-varying system filter research is caused by kalman filter, as a representative of the adaptive filter theory 特性characteristics 数字滤波器具有比模拟滤波器更高的精度，甚至能够实现后者在理论上也无法达到的性能。例如，对于数字滤波器来说很容易就能够做到一个 1000Hz 的低通滤波器允许 999Hz 信号通过并且完全阻止 1001Hz 的信号，模拟滤波器无法区分如此接近的信号。Digital filters with higher precision than analog filter, even can realize the latter in theory cannot achieve performance. For example, it is very easy for digital filter is able to do a 1000Hz allowed the low-pass filter and completely prevent 999Hz signal through 1001Hz signal, the simulation filter can't distinguish so close to signal. 数字滤波器相比模拟滤波器有更高的信噪比。这主要是因为数字滤波器是以数字器件执行运算，从而避免了模拟电路中噪声（如电阻热噪声）的影响。数字滤波器中主要的噪声源是在数字系统之前的模拟电路引入的电路噪声以及在数字系统输入端的模数转换过程中产生的量化噪声。这些噪声在数字系统的运算中可能会被放大，因此在设计数字滤波器时需要采用合适的结构，以降低输入噪声对系统性能的影响。Digital filters with a higher than analog filter SNR. This is mainly because digital filter based on digital devices perform operation so as to avoid the analog circuits noise (such as resistors thermal noise) influence. Digital filters the main noise source is in digital system introduced before the analog circuit noise and in digital system input to produce analog-to-digital conversion of quantization noise. These noise in digital system in the operations of may be amplified, so in design digital filter can be used to reduce the appropriate structure of input noise effect the performance of the system. 数字滤波器还具有模拟滤波器不能比拟的可靠性。组成模拟滤波器的电子元件的电路特性会随着时间、温度、电压的变化而漂移，而数字电路就没有这种问题。只要在数字电路的工作环境下，数字滤波器就能够稳定可靠的工作。Digital filter also has not reliability simulation filter. Of analog filter circuits characteristic of electronic components with time, temperature, voltage change and drift, and digital circuit is no such problem. As long as the work environment in a digital circuit, digital filters can stable and reliable work. 由于奈奎斯特采样定理（en:Nyquist sampling theorem），数字滤波器的处理能力受到系统采样频率的限制。如果输入信号的频率分量包含超过滤波器1/2采样频率的分量时，数字滤波器因为数字系统的“混叠”而不能正常工作。如果超出1/2采样频率的频率分量不占主要地位，通常的解决办法是在模数转换电路之前放置一个低通滤波器（即抗混叠滤波器）将超过的高频成分滤除。否则就必须用模拟滤波器实现要求的功能。Because Nyquist sampling theorem Nyquist sampling theorem (en: the processing, digital filters) sampling frequency by system of ability to limit. If the input signal frequency component contains more than filter 1/2 sampling frequency component, digital filters for digital systems "aliasing" and can't work normally. If exceed 1/2 sampling frequency frequency weight not predominant, usually solution is placed in frequency-field circuit before one low-pass filter (namely fight aliasing filter) will exceed filter the high frequency components. Otherwise we must realize with the simulated filter required functions. 类型type IIR滤波器与FIR滤波器参见：IIR滤波器、FIR滤波器、滤波器设计IIR filter and FIR filters filter, IIR h.a.crosby FIR filters, filter design 线性移不变的数字滤波器包括无限长脉冲响应滤波器（IIR滤波器）和有限长脉冲响应滤波器（FIR滤波器）两种。这两种滤波器的系统函数可以统一以Z变换表示为：Linear moving constant digital filter, including an infinite long impulse response filter (IIR filter) and limited long impulse response filter (FIR filter) two kinds. These two kinds of filter system function can be unified with Z transformation expressed as: 当时，M就是IIR滤波器的阶数，表示系统中反馈环的个数。由于反馈的存在，IIR滤波器的脉冲响应为无限长，因此得名。若A(z) = 1，则系统的脉冲响应的长度为N+1，故而被称作FIR滤波器。At the time, M is the order number IIR filter, said the number of feedback loops in the system. Due to the existence of IIR filter, feedback the impulse response to an infinite long, therefore the name. If A (z) = 1, it is the length of the impulse response system for N + 1, so called FIR filter. IIR滤波器的优点在于，其设计可以直接利用模拟滤波器设计的成果，因为模拟滤波器本身就是无限长冲激响应的。通常IIR滤波器设计的过程如下：首先根据滤波器参数要求设计对应的模拟滤波器（如巴特沃斯滤波器、切比雪夫滤波器等等），然后通过映射（如脉冲响应不变法、双线性映射等等）将模拟滤波器变换为数字滤波器，从而决定IIR滤波器的参数。IIR滤波器的重大缺点在于，由于存在反馈其稳定性不能得到保证。另外，反馈还使IIR滤波器的数字运算可能溢出。The advantages of IIR filter is that its design can directly using simulation filter design results, because analog filter itself is an infinite long impulse response. Usually IIR filter design process are as follows: first of all, according to the requirements of the design parameters of the corresponding filters simulated filter (such as bart hepworth filter, chebyshev filters, etc), and then by mapping (such as pulse response don't strain and bilinear map, etc.) will transform into digital filter simulated filter, to decide IIR filter parameters. The major disadvantage is IIR filter, because it has feedback its stability cannot be guaranteed. In addition, feedback still make IIR filter number operations may overflow. FIR滤波器最重要的优点就是由于不存在系统极点，FIR滤波器是绝对稳定的系统。FIR滤波器还确保了线性相位，这在信号处理中也非常重要。此外，由于不需要反馈，FIR滤波器的实现也比IIR滤波器简单。FIR滤波器的缺点在于它的性能不如同样阶数的IIR滤波器，不过由于数字计算硬件的飞速发展，这一点已经不成为问题。再加上引入计算机辅助设计，FIR滤波器的设计也得到极大的简化。基于上述原因，FIR滤波器比IIR滤波器的应用更广。FIR filter is the most important advantages, because they do not exist system poles, FIR filters is absolutely stable system. FIR filter also ensures that the linear phase in signal processing, this also is very important. In addition, because do not need feedback, the realization of FIR filters than IIR filter simple. FIR filter's weakness is its performance as the same order number IIR filter, but due to the rapid development of digital computing hardware, this is not a problem. Plus introducing computer aided design, the design of FIR filters have also been great simplified. Based on the above reasons, FIR filters the application of IIR filter than more widely.

摘要《数字信号处理》课程是一门理论性和实践性都很强， 它具备高等代数、数值分析、概率统计、随机过程等计算学科的知识; 要求我们学生掌握扎实的基础知识和理论基础。 又是跟其他学科密切相关，即与通信理论、计算机、微电子技术不可分，又是人工智能、模式识别、神经网络等新兴学科的理论基础之一。 本次数字滤波器设计方法是基于MATLAB的数字滤波器的设计。此次设计的主要内容为：IIR数字滤波器和FIR数字滤波器的设计关键词：IIR、FIR、低通、高通、带阻、带通Abstract"Digital Signal Processing" is a theoretical and practical nature are strong, and it has advanced algebra and numerical analysis, probability and statistics, random process such as calculation of discipline knowledge; requires students to acquire basic knowledge and a solid theoretical basis. Is closely related with other subjects, namely, and communication theory, computers, microelectronics can not be separated, but also in artificial intelligence, pattern recognition, neural network theory one of the emerging discipline. The digital filter design method is based on MATLAB for digital filter design. The main elements of design: IIR and FIR digital filter design of digital filter Key Words: IIR, FIR, low pass, high pass, band stop, band pass目录一、 前言 3二、 课程设计的目的 3三、 数字信号处理课程设计说明及要求 3四、 滤波器的设计原理 44.1 数字滤波器简介 44.2 IIR滤波器的设计原理 44.3 FIR滤波器的设计原理 54.4 FIR滤波器的窗函数设计法 6五、 设计内容 65.1 设计题目： 65.2设计程序代码及结果： 7六、 结束语 15七、 参考文献 16一、 前言 数字信号处理（Digital Signal Processing，简称DSP）是一门涉及许多学科而又广泛应用于许多领域的新兴学科。随着信息时代和数字世界的到来，数字信号处理已成为今一门极其重要的学科和技术领域。数字信号处理在通信语音、图像、自动控制、雷达、军事、航空航天、医疗和家用电器等众多领域得到了广泛的应用。在数字信号处理应用中，数字滤波器十分重要并已获得广泛应用。二、 课程设计的目的1) 三、 数字信号处理课程设计说明及要求所需硬件：PC机四、 滤波器的设计原理4.1 数字滤波器简介 数字滤波器是一种用来过滤时间离散信号的数字系统，通过对抽样数据进行数学处理来达到频域滤波的目的。可以设计系统的频率响应，让它满足一定的要求，从而对通过该系统的信号的某些特定的频率成分进行过滤，这就是滤波器的基本原理。如果系统是一个连续系统，则滤波器称为模拟滤波器。如果系统是一个离散系统，则滤波器称为数字滤波器。信号 通过线性系统后，其输出 就是输入信号 和系统冲激响应 的卷积。除了 外， 的波形将不同于输入波形 。从频域分析来看，信号通过线性系统后，输出信号的频谱将是输入信号的频谱与系统传递函数的乘积。除非 为常数，否则输出信号的频谱将不同于输入信号的频谱，某些频率成分 较大的模，因此， 中这些频率成分将得到加强，而另外一些频率成分 的模很小甚至为零， 中这部分频率分量将被削弱或消失。因此，系统的作用相当于对输入信号的频谱进行加权。4.2 IIR滤波器的设计原理IIR数字滤波器的设计一般是利用目前已经很成熟的模拟滤波器的设计方法来进行设计，通常采用模拟滤波器原型有butterworth函数、chebyshev函数、bessel函数、椭圆滤波器函数等。IIR数字滤波器的设计步骤：（1） 按照一定规则把给定的滤波器技术指标转换为模拟低通滤波器的技术指标；（2） 根据模拟滤波器技术指标设计为响应的模拟低通滤波器；（3） 很据脉冲响应不变法和双线性不变法把模拟滤波器转换为数字滤波器；（4） 如果要设计的滤波器是高通、带通或带阻滤波器，则首先把它们的技术指标转化为模拟低通滤波器的技术指标，设计为数字低通滤波器，最后通过频率转换的方法来得到所要的滤波器。4.3 FIR滤波器的设计原理FIR滤波器通常采用窗函数方法来设计。窗设计的基本思想是，首先选择一个适当的理想选频滤波器（它总是具有一个非因果，无限持续时间脉冲响应），然后街区（加窗）它的脉冲响应得到线性相位和因果FIR滤波器。我们用Hd（e^jw）表示理想的选频滤波器，它在通带上具有单位增益和线性相位，在阻带上具有零响应。一个带宽wc

Two adjustable parameters FIR filter system hardware design This design using FPGA parallel architecture, computing speed of the characteristics and reliability characteristics of high-speed USB2.0 interface, designed a FPGA + USB2.0 + computer FIR digital filter system, FPGA's speed and machine flexibility of Computer organically through the USB2.0 bus, combined block diagram shown in Figure 3. On the one hand, the computer will calculate the configuration parameters transmitted to the next through the USB2.0 bus, FPGA, in order to achieve different windows, different cut-off frequency of the FIR filter. On the other hand, use 10-bit A / D converter for signal conversion, digital signal input to the FPGA device, in the FPGA devices for FIR filtering, the filtered data through USB2.0 Bus Transfer to the machine operator machine. 2,1 A / D converter module A / D converter module main function is to digitize the analog signal, and then into the FPGA in digital signal processing. A / D converter module structure shown in Figure 4, the first analog signals for signal conditioning, and then A / D converter in FPGA will be under the control of signal conditioning to convert a digital signal, power supply module for the chip provides 5V and 3.3V power. 2.1.1 Signal Conditioning Circuit System uses the A / D conversion chip analog input signal peak-peak voltage of +2 V, for some of the output analog signal range does not comply with the A / D conversion chip requirements, in order to expand the application of the system, and therefore A / D conversion before the signal conditioning. Conditioning is the amplification, buffering, or calibration of analog signals to make it suitable for analog / digital converter (ADC) input. The key is to choose the op-amp. The design of signal conditioning circuit for two voltage-follower circuits, using low-power voltage feedback amplifier AD8052. Signal conditioning circuit in Figure 5. The amplifier input voltage range-0.2V ~ 4V. 8-pin voltage, using a single +5 V power supply to work properly. Input signal for the Signal, according to the diagram of the circuit connection, the output voltage range of the signal AD Sigin enables A / D conversion chip work correctly. 2.1.2 A / D conversion circuit A / D conversion circuit according to pre-selected sampling period, the input to the system's analog signal is collected. Taking into account the need for system flexibility and future upgrades, the design of A / D conversion chip to use to use 10-bit accuracy, sampling rate as low as 20kHz, up to 40MHz of the AD9203 chip. AD9203 is a AD's buy one single, low-voltage high-speed A / D conversion chip. It is stable and reliable accuracy in the whole sample within the bandwidth, and always remained a 10-bit precision; in 40MHz sampling rate, the effective number of bits still to reach 9.55, the differential non-linearity of ± 0.25 LSB, SNR and distortion remain at around 59dB. AD9203 operating voltage more flexible, allowing changes in the context of 2.7V ~ 3.6V, especially suitable for portable devices at low voltage, high-speed operation. A / D circuit shown in Figure 6. Analog signal ADSigin from 25 feet input, the conversion provided by the FPGA clock ADCLK from 15 feet input, converted 10-bit digital signal ADD0 ~ ADD9 from 3 to 12 feet out to the FPGA, the FPGA in digital signal processing. 2.2 Power Supply Circuit As the external power supply voltage of 5V, while the A / D conversion chip AD9203 operating voltage and the FPGA's I / O operating voltage is as 3.3V, so the design of the voltage conversion circuit, the voltage from 5V to 3.3V conversion. Voltage conversion chips used in LT1587CM-3.3, the circuit connection as shown in Figure 7. In the design, the circuit added 2Amax fuse to prevent the currents too large to burn the circuit. 2.3 FPGA Module Design FPGA module is the core of filter system, bearing all of the digital circuit part. In the design process, emphasizing the concept of system on chip, implemented on the FPGA platform, the system needed in all the digital logic, including adders, multipliers, buffers, PLL (Phase-locked Loop, PLL), USB interface logic. Allowing the number of parts of the system is fully programmable adjustable state, just update the FPGA program can be demand-driven and has strong adaptability and flexibility.

这么专业的东西，即使垂涎100分，也做不来。。。

With the information era and the advent of the digital world, digital signal processing in many areas has been widely used. Signal processing filter is the main content of the main applications of signal filtering, detection and parameter estimation techniques, is the most widely used in a system. IIR digital filter is an important kind of filter, It uses the lower order can be achieved very good frequency selective properties, in communication, speech signal processing, HDTV, biomedical and seismic survey and many other aspects are widely used. This paper right IIR digital filter basic theory, performance and design methods to conduct a comprehensive analysis; and MATLAB, the IIR digital filter design the study, which mainly include : the same impulse response method, bilinear transform and direct design. And on this basis, respectively, for noise pollution after the ECG signal and the voice signal spectrum analysis, According to the spectrum and signal characteristics calculated filter parameters, design corresponding IIR digital filters, for the filtering experiment. 디지털 세계의 정보 시대 그리고 출현으로, 계속 많은 지역에서 디지털 신호 처리는 널리 이용된다. 신호 처리 여과기는 거르는 신호의 주요 응용 프로그램의 주요 내용, 탐지이고 매개변수 의견 기술은, 체계에서 널리 이용된다. IIR 디지털 여과기는 여과기의 중요한 종류이다, 하층 사회를 달성한 아주 좋은 주파수 선택적인 재산, 커뮤니케이션, HDTV에서 가공하는일 수 있다, 음성 신호 생물 의학 사용하고 지진 조사 및 다른 많은 양상은 널리 이용된다. 포괄적 분석을 시행하는 이 서류상 권리 IIR 디지털 여과기 기본적인 이론, 성과 및 설계법; 그리고 주로 다음을 포함하는 MATLAB 의 IIR 디지털 여과기 디자인 학문: 쌍일차 동일한 순간 자극 응답 방법은 디자인을 변형시키고 지시한다. 그리고 스펙트럼과 신호 특성에 따르면 ECG 신호 그리고 음성 신호 빛띠 분석 후에 소음 공해를 위한 이 기초에, 거르는 실험을 위한 각각, 여과기 매개변수, 디자인 대응 IIR 디지털 여과기를, 산출했다. 阿拉伯文到英语 测试版朝鲜语到英语 测试版德语到法语德语到英语俄语到英语 测试版法语到德语法语到英语葡萄牙语到英语日语到英语 测试版西班牙语到英语意大利语到英语英语到阿拉伯文 测试版英语到朝鲜语 测试版英语到德语英语到俄语 测试版英语到法语英语到葡萄牙语英语到日语 测试版英语到西班牙语英语到意大利语英语到中文(繁体) 测试版英语到中文(简体) 测试版中文到英语 测试版中文(繁体到简体) 测试版中文(简体到繁体) 测试版 更好的翻译建议 感谢您为 Google 翻译提供翻译建议。我们会利用您的建议在将来更新我们的系统时提高翻译质量。 디지털 세계의 정보 시대 그리고 출현으로, 계속 많은 지역에서 디지털 신호 처리는 널리 이용된다. 신호 처리 여과기는 거르는 신호의 주요 응용 프로그램의 주요 내용, 탐지이고 매개변수 의견 기술은, 체계에서 널리 이용된다. IIR 디지털 여과기는 여과기의 중요한 종류이다, 하층 사회를 달성한 아주 좋은 주파수 선택적인 재산, 커뮤니케이션, HDTV에서 가공하는일 수 있다, 음성 신호 생물 의학 사용하고 지진 조사 및 다른 많은 양상은 널리 이용된다. 포괄적 분석을 시행하는 이 서류상 권리 IIR 디지털 여과기 기본적인 이론, 성과 및 설계법; 그리고 주로 다음을 포함하는 MATLAB 의 IIR 디지털 여과기 디자인 학문: 쌍일차 동일한 순간 자극 응답 방법은 디자인을 변형시키고 지시한다. 그리고 스펙트럼과 신호 특성에 따르면 ECG 신호 그리고 음성 신호 빛띠 분석 후에 소음 공해를 위한 이 기초에, 거르는 실험을 위한 각각, 여과기 매개변수, 디자인 대응 IIR 디지털 여과기를, 산출했다.